Lead Software Engineer

Position: Lead AMS Verification Engineer

Location: Bangalore

Experience: 8+ years

About the Rol

eWe are seeking an experienced Lead AMS Verification Engineer to drive the verification of Analog Mixed-Signal (AMS) SoC/IP designs. The ideal candidate will possess strong expertise in AMS verification methodologies, behavioral modeling, mixed-signal simulation, and verification automation. This role involves close collaboration with analog and digital design teams, ownership of verification planning and execution, and technical leadership within the verification team

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Key Responsibiliti

• esDevelop and maintain AMS verification methodologies and flows (AXUM, AVUM, UVM-AMS
• ).Review design specifications and create comprehensive verification plan
• s.Manage BOM and netlist generation activitie
• s.Collaborate with analog and digital design teams to track design updates and ensure verification readines
• s.Plan work allocation within the team and provide technical leadership on critical verification task
• s.Execute, debug, and analyze SPICE-based and digital simulations for AMS SoCs, IPs, and subsystem
• s.Review simulation setups and validate test conditions against design inten
• t.Perform root-cause analysis of functional mismatches using waveform and debug tool
• s.Develop behavioral models using Verilog-A/AMS, SV-RNM, and VHDL-AM
• S.Optimize testbenches and simulation environments using Cadence and Synopsys verification tool
• s.Improve verification efficiency through automation, regression management, and workflow enhancement
• s.Document verification methodologies, debug findings, and technical learning
• s.Mentor team members and actively contribute to technical discussions and problem-solving activitie

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Required Skills & Qualificati

• onsStrong expertise in AMS verification methodologies and mixed-signal simulati
• on.Hands-on experience with assertion-based verification, checkers, and analog behavioral modeli
• ng.Advanced knowledge of SystemVerilog, UVM, Verilog-A/AMS, and SV-R
• NM.Strong understanding of analog and digital circuit fundamenta
• ls.Experience with SPICE simulators and digital verification/debug environmen
• ts.Proficiency with Cadence Virtuoso, Xcelium, Synopsys VCS, and related EDA too
• ls.Strong scripting skills in Python, Perl, and/or TCL for automation and regression manageme
• nt.Excellent debugging, analytical, and problem-solving skil
• ls.Effective communication and collaboration skills with cross-functional tea

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Preferred Qualificat

• ionsExperience with AMS SoC-level verificat
• ion.Exposure to UVM-AMS verification environme
• nts.Experience leading technical teams and mentoring engine
• ers.Strong understanding of verification methodology development and deploym