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RTL Design Engineer
Actively Reviewing
PQAngels Technologies Pvt Ltd
Job Description
Company Description :
PQAngels Technologies is a specialized in building high-performance engineering teams for the Post Quantum era of innovation. The company connects cutting-edge technology organizations with highly skilled professionals in Semiconductors, Cloud Computing, and Data Storage ecosystems. PQAngels Technologies focuses on niche engineering roles, enabling clients to innovate faster while offering candidates access to advanced projects and career growth. Applicants can expect to work with leading global tech companies and be part of teams driving next-generation hardware and software solutions. Role Summary : We are looking for experienced RTL Design Engineers to develop synthesizable RTL and collaborate with DV and PD teams. Key Responsibilities: • RTL coding using Verilog/SystemVerilog. • Microarchitecture implementation. • Block level design ownership. • Lint and CDC closure. • Synthesis support. • Debug RTL issues. • Interface with DV and PD teams. • Documentation and reviews. • Support integration activities. • Ensure coding guidelines compliance. • Performance optimization. • Participate in customer discussions.
Or Direct Apply : https://pqangelstech.com/ Or Mail: [email protected]
Requirements
Mandatory Technical Skills
• Verilog
• SystemVerilog
• AMBA protocols
• Synthesis
• Lint
• CDC
• TCL/Perl/Python
EDA Tools
• Synopsys Design Compiler
• Spyglass
• VC Spyglass
Qualifications : Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field. Soft Skills Strong communication, analytical thinking, stakeholder management, problem solving and ability to work in global teams
Benefits
PQAngels Technologies is a specialized in building high-performance engineering teams for the Post Quantum era of innovation. The company connects cutting-edge technology organizations with highly skilled professionals in Semiconductors, Cloud Computing, and Data Storage ecosystems. PQAngels Technologies focuses on niche engineering roles, enabling clients to innovate faster while offering candidates access to advanced projects and career growth. Applicants can expect to work with leading global tech companies and be part of teams driving next-generation hardware and software solutions. Role Summary : We are looking for experienced RTL Design Engineers to develop synthesizable RTL and collaborate with DV and PD teams. Key Responsibilities: • RTL coding using Verilog/SystemVerilog. • Microarchitecture implementation. • Block level design ownership. • Lint and CDC closure. • Synthesis support. • Debug RTL issues. • Interface with DV and PD teams. • Documentation and reviews. • Support integration activities. • Ensure coding guidelines compliance. • Performance optimization. • Participate in customer discussions.
Or Direct Apply : https://pqangelstech.com/ Or Mail: [email protected]
Requirements
Mandatory Technical Skills
• Verilog
• SystemVerilog
• AMBA protocols
• Synthesis
• Lint
• CDC
• TCL/Perl/Python
EDA Tools
• Synopsys Design Compiler
• Spyglass
• VC Spyglass
Qualifications : Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field. Soft Skills Strong communication, analytical thinking, stakeholder management, problem solving and ability to work in global teams
Benefits
- Competitive compensation
- Learning & career growth
- Exposure to global semiconductor projects
- Collaborative work environment
- Opportunities to work on cutting-edge technologies
- Continuous technical learning
Required Skills
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